$ C258 32820
$ CY7C258 32820
$ P258 32820
00000 : PROM [ 4 ]
32768     : IREG 13 [ REG | COMB ]
          : IREG 12 [ REG | COMB ]
          : IREG 11 [ REG | COMB ]
          : IREG 10 [ REG | COMB ]
          : IREG  9 [ REG | COMB ]
          : IREG  4 [ REG | COMB ]
          : IREG  3 [ REG | COMB ]
          : IREG  2 [ REG | COMB ]
          : IREG 14 [ REG | COMB ]
          : FUSES 00000 *
          : IREG  6 [ REG | COMB ]
          : IREG  5 [ REG | COMB ]
          : COMMENT Inputs 2..6,9..14 Register ByPass *
          : FB 13 [ PIN | Q ]
          : FB 12 [ PIN | Q ]
          : FB 11 [ PIN | Q ]
          : FB 10 [ PIN | Q ]
          : FB  9 [ PIN | Q ]
          : FB  4 [ PIN | Q ]
          : FB  3 [ PIN | Q ]
          : FB  2 [ PIN | Q ]
          : FB 14 [ PIN | Q ]
          : FUSES 00000 *
          : FB  6 [ PIN | Q ]
          : FB  5 [ PIN | Q ]
          : COMMENT Inputs 2..6,9..14  Path Select *
          : FUSES 00000000 *
          : REG 15 [ D | COMB ]
          : REG 16 [ D | COMB ]
          : REG 17 [ D | COMB ]
          : REG 18 [ D | COMB ]
          : REG 19 [ D | COMB ]
          : REG 23 [ D | COMB ]
          : REG 24 [ D | COMB ]
          : REG 25 [ D | COMB ]
	  : COMMENT Outputs 25..23,19..15 Bypass Muxes *
          : SELECT 36 [ AR | AP ]
          : SELECT 35 [ AR | AP ]
          : SELECT 34 [ AR | AP ]
          : SELECT 33 [ AR | AP ]
          : SELECT 32 [ AR | AP ]
          : SELECT 31 [ AR | AP ]
          : SELECT 30 [ AR | AP ]
          : SELECT 29 [ AR | AP ]
          : SELECT 15 [ AR | AP ]
          : SELECT 16 [ AR | AP ]
          : SELECT 17 [ AR | AP ]
          : SELECT 18 [ AR | AP ]
          : SELECT 19 [ AR | AP ]
          : SELECT 23 [ AR | AP ]
          : SELECT 24 [ AR | AP ]
          : SELECT 25 [ AR | AP ]
	  : COMMENT Register Initialization word *
          : FUSES 00000000 *
          : FUSES 0 * : COMMENT Cs/h bit *
          : IREG 27 [ REG | COMB ]
          : REG  37 [ D   | COMB_default ]
          : IPOL 27 [ AL  |  AH ]
	  : COMMENT Output Enable macrocell control bits *
          : IREG 1  [ REG | COMB ]
          : REG  38 [ D   | COMB_default ]
          : FUSES 00 *
	  : COMMENT Initialization macrocell control bits *
" -------------
$ C259 32828
$ CY7C259 32828
$ P259 32828
00000 : PROM [ 4 ]
32768
      : IREG 19 [ REG | COMB ]
      : IREG 18 [ REG | COMB ]
      : IREG 17 [ REG | COMB ]
      : IREG 16 [ REG | COMB ]
      : IREG 15 [ REG | COMB ]
      : IREG 13 [ REG | COMB ]
      : FUSES 00000 *
      : IREG 10 [ REG | COMB ]
      : IREG  9 [ REG | COMB ]
      : IREG  7 [ REG | COMB ]
      : IREG  6 [ REG | COMB ]
      : IREG  5 [ REG | COMB ]
      : COMMENT Inputs 5..7,9,10,13,15..19  Path Select *
      : FB 19 [ PIN | Q ]
      : FB 18 [ PIN | Q ]
      : FB 17 [ PIN | Q ]
      : FB 16 [ PIN | Q ]
      : FB 15 [ PIN | Q ]
      : FB 13 [ PIN | Q ]
      : FUSES 00000 *
      : FB 10 [ PIN | Q ]
      : FB  9 [ PIN | Q ]
      : FB  7 [ PIN | Q ]
      : FB  6 [ PIN | Q ]
      : FB  5 [ PIN | Q ]
      : COMMENT Inputs 5..7,9,10,13,15..19 Register ByPass *
      : REG 21 [ D | COMB ]
      : REG 23 [ D | COMB ]
      : REG 24 [ D | COMB ]
      : REG 25 [ D | COMB ]
      : REG 26 [ D | COMB ]
      : REG 27 [ D | COMB ]
      : REG 31 [ D | COMB ]
      : REG 32 [ D | COMB ]
      : REG 33 [ D | COMB ]
      : REG 34 [ D | COMB ]
      : REG 37 [ D | COMB ]
      : REG 38 [ D | COMB ]
      : REG 39 [ D | COMB ]
      : REG 40 [ D | COMB ]
      : REG 41 [ D | COMB ]
      : REG 42 [ D | COMB ]
      : COMMENT Outputs 42..37,34..31,27..23,21 Bypass Muxes *
      : SELECT 21 [ AR | AP ]
      : SELECT 23 [ AR | AP ]
      : SELECT 24 [ AR | AP ]
      : SELECT 25 [ AR | AP ]
      : SELECT 26 [ AR | AP ]
      : SELECT 27 [ AR | AP ]
      : SELECT 31 [ AR | AP ]
      : SELECT 32 [ AR | AP ]
      : SELECT 33 [ AR | AP ]
      : SELECT 34 [ AR | AP ]
      : SELECT 37 [ AR | AP ]
      : SELECT 38 [ AR | AP ]
      : SELECT 39 [ AR | AP ]
      : SELECT 40 [ AR | AP ]
      : SELECT 41 [ AR | AP ]
      : SELECT 42 [ AR | AP ]
      : COMMENT Register Initialization word *
      : FUSES 0 *  : COMMENT Cs/h bit *
      : IREG 3  [ REG | COMB ]
      : REG  45 [ D   | COMB_default ]
      : IPOL 3  [ AL  |  AH ]
      : COMMENT Output Enable macrocell control bits *
      : IREG 2  [ REG | COMB ]
      : REG 46  [ D | COMB_default ]
      : FUSES 0000000000 *
      : COMMENT Initialization macrocell control bits *

$ !EOF!
